RM48L952PGET - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

RM48L952PGET
Manufacturer

TI
ChipWorker Part#

CW91608387
Category

Microcontroller, MCU IC
Package

LQFP-144
Description

MCU 16Bit/32Bit RM48Lx52 ARM Cortex R4F RISC 3072KB Flash 1.2V/3.3V 144Pin LQFP Tray
Documentation

Datasheet

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RM48L952PGET Specifications

Attribute	Attribute Value

Part Number	RM48L952PGET
Manufacturer	TI
ChipWorker Part#	CW91608387
Category	Microcontroller, MCU IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	144 Pin
Case/Package	LQFP-144
Frequency	220 MHz
Supply Voltage (DC)	1.14V (min)
Number of Positions	144 Position
Clock Speed	220 MHz
RAM Memory Size	256 KB
Number of Bits	32 Bit
FLASH Memory Size	3145728 B
Number of UARTs	2 UART
Number of ADCs	2 ADC
Number of Inputs and Outputs	64 Input IO
Operating Temperature (Max)	105 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage (Max)	1.32 V
Supply Voltage (Min)	1.14 V
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Size-Length	20.2 mm
Size-Width	20.2 mm
Size-Height	1.45 mm
Operating Temperature	-40℃ ~ 105℃ (TA)
Product Lifecycle Status	Active
Packaging	Each
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15

Product Description

The RM48L952PGET is a 32-bit high-performance RISC Flash Microcontroller for safety systems. The safety architecture includes dual CPUs in lockstep, CPU and memory BIST logic, ECC on both the flash and the data SRAM, parity on peripheral memories and loopback capability on peripheral I/Os. The RM48L952 device integrates the ARM Cortex-R4F floating-point CPU. The CPU offers an efficient 1.66 DMIPS/MHz and has configurations that can run up to 220MHz, providing up to 365 DMIPS. The device supports the little-endian [LE] format. The RM48L952 device has 3MB of integrated flash and 256kB of data RAM. Both the flash and RAM have single-bit error correction and double-bit error detection. The flash memory on this device is a non-volatile, electrically erasable and programmable memory implemented with a 64-bit-wide data bus interface. The flash operates on a 3.3V supply input (same level as I/O supply) for all read, program and erase operations.
Dual CPUs running in lockstep
ECC on flash and RAM interfaces
Built-in self-test (BIST) for CPU and on-chip RAMs
Error signalling module with error pin
Voltage and clock monitoring
Efficient 1.66 DMIPS/MHz with 8-stage pipeline
FPU with single- and double-precision
Memory protection unit (MPU) - 12 region
Open architecture with third-party support
16-bit External memory interface
Consistent memory map across family
Real-time interrupt (RTI) timer OS timer
96-channel Vectored interrupt module (VIM)
2-channel Cyclic redundancy checker (CRC)
Direct memory access (DMA) controller
Frequency-modulated phase-locked loop 9FMPLL) with built-in slip detector
Separate no modulating PLL
Trace and calibration capabilities
10/100Mbps Ethernet MAC (EMAC) - IEEE 802.3 compliant
2-port USB host controller, one full-speed USB device port

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