SN65LVDM176D - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN65LVDM176D
Manufacturer

TI
ChipWorker Part#

CW15902110
Category

Interface IC, Interface Controller
Package

SOIC-8
Description

M-LVDS PHY (<500Mbps) Half-Duplex LVDM Transceiver LVDS Transceiver 400Mbps 0.454V 8Pin SOIC Tube
Documentation

Datasheet

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SN65LVDM176D Specifications

Attribute	Attribute Value

Part Number	SN65LVDM176D
Manufacturer	TI
ChipWorker Part#	CW15902110
Category	Interface IC, Interface Controller
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	8 Pin
Case/Package	SOIC-8
Supply Voltage (DC)	3.00V (min)
Output Current	8 mA
Supply Current	15 mA
Number of Circuits	1 Circuit
Number of Positions	8 Position
Power Dissipation	725 W
Data Rate	400 Mbps
Input Current (Min)	20 µA
Number of Inputs	1 Input
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Power Dissipation (Max)	725 mW
Supply Voltage	3V ~ 3.6V
Supply Voltage (Max)	3.6 V
Supply Voltage (Min)	3 V
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Size-Length	4.9 mm
Size-Width	3.91 mm
Size-Height	1.58 mm
Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

Product Description

The SN65LVDM176D is a half-duplex LVDM Transceiver uses low-voltage differential signaling (LVDS) to achieve signaling rates as high as 400 Mbit/s. The circuits are similar to TIA/EIA-644 standard compliant devices (SN65LVDS) counterparts except that the output current of the drivers is doubled. This modification provides a minimum differential output voltage magnitude of 247mV into a 50R load and allows double-terminated lines and half-duplex operation. The receivers detect a voltage difference of less than 50mV with up to 1V of ground potential difference between a transmitter and receiver. The intended application of this device and signaling technique is for half-duplex or multiplex baseband data transmission over controlled impedance media of approximately 100R characteristic impedance. The transmission media may be printed-circuit board traces, backplanes or cables.
Designed for signalling rates of 400 Mbit/s
ESD protection exceeds 15kV on bus pins
Low-voltage differential signalling
Valid output with as little as 50mV input voltage difference
1.7ns Driver, 3.7ns receiver propagation delay times
LVTTL levels are 5V tolerant
Bus pins are high impedance when disabled or with VCC less than 1.5V
Open-circuit fail-safe receiver
Green product and no Sb/Br

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