SN65MLVD2DRBT - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN65MLVD2DRBT
Manufacturer

TI
ChipWorker Part#

CW41260444
Category

Interface IC, Interface Controller
Package

VDFN-8
Description

TEXAS INSTRUMENTS SN65MLVD2DRBT Differential Line Receiver IC, 1 Receiver, 9kV ESD, 3V to 3.6V, SON-8
Documentation

Datasheet

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SN65MLVD2DRBT Specifications

Attribute	Attribute Value

Part Number	SN65MLVD2DRBT
Manufacturer	TI
ChipWorker Part#	CW41260444
Category	Interface IC, Interface Controller
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	8 Pin
Case/Package	VDFN-8
Supply Voltage (DC)	3.00V (min)
Supply Current	25 mA
Data Rate	250 Mbps
Input Current (Min)	25 μA
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage	3V ~ 3.6V
Supply Voltage (Max)	3.6 V
Supply Voltage (Min)	3 V
	expand all
Size-Length	3.15 mm
Size-Width	3.15 mm
Size-Height	0.95 mm
Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Tape & Reel (TR)
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	5A991.b.1

Product Description

DESCRIPTION
The SN65MLVD2 and SN65MLVD3 are single-channel M-LVDS receivers. These devices are designed in full compliance with the TIA/EIA-899 (M-LVDS) standard, which are optimized to operate at signaling rates up to 250 Mbps. Each receiver channel is controlled by a receive enable (RE). When RE = low, the corresponding channel is enabled; when RE = high, the corresponding channel is disabled.
FEATURES
• Low-Voltage Differential 30-Ω to 55-Ω Line Receivers for Signaling Rates(1) up to 250Mbps; Clock Frequencies up to 125MHz
• SN65MLVD2 Type-1 Receiver Incorporates 25 mV of Input Threshold Hysteresis
• SN65MLVD3 Type-2 Receiver Provides 100 mV Offset Threshold to Detect Open-Circuit and Idle-Bus Conditions
• Wide Receiver Input Common-Mode Voltage Range, –1 V to 3.4 V, Allows 2 V of Ground Noise
• Improved VIT (35 mV)
• Meets or Exceeds the M-LVDS Standard TIA/EIA-899 for Multipoint Topology
• High Input Impedance with Low Supply Voltage
• Bus-Pin HBM ESD Protection Exceeds 9 kV
• Packaged in 8-Pin SON (DRB) 70% Smaller Than8-PinSOIC
APPLICATIONS
• Parallel Multipoint Data and Clock
Transmission via Backplanes and Cables
• Cellular Base Stations
• Central Office Switches
• Network Switches and Routers

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