SN74LS193N ,Logic Controller, Logic IC - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Popularity Score

129 points

Part No

SN74LS193N
Manufacturer

TI
ChipWorker Part#

CW10070263
Category

Logic Controller, Logic IC
Package

PDIP-16
Description

TEXAS INSTRUMENTS SN74LS193N Binary Synchronous Up / Down Counter, LS Family, 32MHz, 4.75V to 5.25V, DIP-16
Documentation

Datasheet
Ships from

Moscow
Наличие

In Stock
Estimated Price

$ 1.12

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SN74LS193N Specifications

Consulting Engineer >>

Attribute	Attribute Value

Part Number	SN74LS193N
Manufacturer	TI
ChipWorker Part#	CW10070263
Category	Logic Controller, Logic IC
Documentation	Datasheet
Mounting Style	Through Hole
Number of Pins	16 Pin
Case/Package	PDIP-16
Frequency	32.0 MHz
Supply Voltage (DC)	4.75V ~ 5.25V
Number of Outputs	4 Output
Number of Circuits	1 Circuit
Number of Positions	16 Position
Clock Speed	32 MHz
Number of Bits	4 Bit
Voltage Nodes	5.00 V
Output Current Drive	-50.0 µA
Number of Inputs	4 Input
Operating Temperature (Max)	70 ℃
Operating Temperature (Min)	0 ℃
Supply Voltage	4.75V ~ 5.25V
Supply Voltage (Max)	5.25 V
Supply Voltage (Min)	4.75 V
	expand all
Operating Temperature	0℃ ~ 70℃
Product Lifecycle Status	Active
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

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Product Description

The SN74LS193N is a synchronous 4-bit up/down Binary Counter with dual clock and clear. This monolithic circuit is synchronous reversible counter having a complexity of 55 equivalent gates. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincidently with each other when so instructed by the steering logic. This mode of operation eliminates the output counting spikes which are normally associated with asynchronous counter. The outputs of the four master-slave flip-flops are triggered by a low-to-high-level transition of either count input. The direction of counting is determined by which count input is pulsed while the other count input is high. A clear input has been provided which forces all outputs to the low level when a high level is applied. The clear function is independent of the count and load inputs. The clear, count and load inputs are buffered to lower the drive requirements.
Cascading circuitry provided internally
Individual preset to each flip-flop
Fully independent clear input
Pb-free product

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