SN74LVC16244ADGGR - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN74LVC16244ADGGR
Manufacturer

TI
ChipWorker Part#

CW10387200
Category

Logic Controller, Logic IC
Package

TSSOP-48
Description

16Bit Buffer/Driver With 3-State Outputs 48-TSSOP -40℃ to 125℃
Documentation

Datasheet

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SN74LVC16244ADGGR Specifications

Attribute	Attribute Value

Part Number	SN74LVC16244ADGGR
Manufacturer	TI
ChipWorker Part#	CW10387200
Category	Logic Controller, Logic IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	48 Pin
Case/Package	TSSOP-48
Supply Voltage (DC)	2.00V ~ 3.60V
Number of Outputs	16 Output
Number of Channels	4 Channel
Number of Positions	48 Position
Number of Bits	16 Bit
Propagation Delay Max (tpd)	5.20 ns
Voltage Nodes	3.30 V, 2.70 V, 2.50 V, 1.80 V
Output Current Drive	-1.00 mA
Number of Inputs	16 Input
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage	1.65V ~ 3.6V
Supply Voltage (Max)	3.6 V
Supply Voltage (Min)	1.65 V
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Size-Length	12.6 mm
Size-Width	6.2 mm
Size-Height	1.05 mm
Operating Temperature	-40℃ ~ 125℃ (TA)
Product Lifecycle Status	Active
Packaging	Tape & Reel (TR)
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

Product Description

The SN74LVC16244ADGGR is a 16-bit Buffer/Driver with 3-state outputs. This device is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers and bus-oriented receivers and transmitters. It can be used as four 4-bit buffers, two 8-bit buffers or one 16-bit buffer. The device provides true outputs and symmetrical active-low output-enable (OE) inputs. Inputs can be driven from either 3.3/5V devices. This feature allows the use of this device as a translator in a mixed 3.3 and 5V system environment. This device is fully specified for partial-power-down applications using IOFF. The IOFF circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pull-up resistor and the minimum value of the resistor is determined by the current-sinking capability of the driver.
IOFF Supports partial-power-down mode operation
Supports mixed-mode signal operation on all ports
Latch-up performance exceeds 250mA per JESD 17
Inputs accept voltages to 5.5V
4.1ns at 3.3V Propagation delay (tpd)
<0.8V at VCC = 3.3V, TA = 25°C VOLP (output ground bounce)
>2V at VCC = 3.3V, TA = 25°C VOHV (output VOH undershoot)
Green product and no Sb/Br

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