SN74LVC2G125YZPR - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN74LVC2G125YZPR
Manufacturer

TI
ChipWorker Part#

CW19792133
Category

Logic Control, Logic Gate IC
Package

DSBGA-8
Description

TEXAS INSTRUMENTS SN74LVC2G125YZPR Buffer Gate, LVC Family, 1Input, 32mA, 1.65V to 5.5V, DSBGA-8
Documentation

Datasheet

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SN74LVC2G125YZPR Specifications

Attribute	Attribute Value

Part Number	SN74LVC2G125YZPR
Manufacturer	TI
ChipWorker Part#	CW19792133
Category	Logic Control, Logic Gate IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	8 Pin
Case/Package	DSBGA-8
Supply Voltage (DC)	5.00 V, 5.50 V (max)
Number of Outputs	2 Output
Output Current	32 mA
Number of Circuits	2 Circuit
Number of Channels	2 Channel
Number of Positions	8 Position
Number of Bits	2 Bit
Propagation Delay Max (tpd)	3.70 ns
Number of Gates	2 Gate
Number of Inputs	1 Input
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage	1.65V ~ 5.5V
Supply Voltage (Max)	5.5 V
Supply Voltage (Min)	1.65 V
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Size-Length	1.9 mm
Size-Width	0.9 mm
Size-Height	0.3 mm
Operating Temperature	-40℃ ~ 125℃ (TA)
Product Lifecycle Status	Active
Packaging	Tape & Reel (TR)
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

Product Description

The SN74LVC2G125YZPR is a dual Bus Buffer Gate with 3-state outputs. The outputs are disabled when the associated output-enable (OE) input is high. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pull-up resistor, the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
±24mA Output drive at 3.3V
<0.8V at VCC = 3.3V (typical) VOLP (Output ground bounce)
>2V at VCC = 3.3V Typical VOHV (Output VOH undershoot)
Inputs from a Maximum of 5.5V down
10µA Maximum ICC low power consumption
Maximum tpd of 4.3ns at 3.3V
Ioff supports live insertion, partial power down mode and back drive protection
ESD protection exceeds JESD 22
Latch-up performance exceeds 100mA per JESD 78, Class II

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