TL16C752BPTRG4 - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

TL16C752BPTRG4
Manufacturer

TI
ChipWorker Part#

CW102406726
Category

UART Chip, UART Interface IC
Package

LQFP-48
Description

UART 2CH 64Byte FIFO 3.3V 48Pin LQFP T/R
Documentation

Datasheet

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TL16C752BPTRG4 Specifications

Attribute	Attribute Value

Part Number	TL16C752BPTRG4
Manufacturer	TI
ChipWorker Part#	CW102406726
Category	UART Chip, UART Interface IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	48 Pin
Case/Package	LQFP-48
Supply Voltage (DC)	2.70V (min)
Operating Voltage	3.30 V
Supply Current	20 mA
Number of Channels	2 Channel
Data Rate	3.00 Mbps
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage	2.7V ~ 3.6V
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Size-Height	1.45 mm
Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Tape & Reel (TR)
RoHS	RoHS Compliant
Lead-Free Status	Lead Free

Product Description

description
The TL16C752B is a dual universal asynchronous receiver/transmitter (UART) with 64-byte FIFOs, automatic hardware/software flow control, and data rates up to 3.125 Mbps. The TL16C752B offers enhanced features. It has a transmission control register (TCR) that stores received FIFO threshold level to start/stop transmission during hardware and sofware flow control. With the FIFO RDY register, the software gets the status of TXRDY/RXRDY for all four ports in one access.
Pin Compatible With ST16C2550 With Additional Enhancements
Up to 1.5 Mbps Baud Rate When Using Crystal (24 MHz Input Clock)
Up to 2.25 Mbps Baud Rate When Using Oscillator or Clock Source (36 MHz Input Clock)
64-Byte Transmit FIFO
64-Byte Receive FIFO With Error Flags
Programmable and Selectable Transmit and
Receive FIFO Trigger Levels for DMA and Interrupt Generation
Programmable Receive FIFO Trigger Levels for Software/Hardware Flow Control
Software/Hardware Flow Control
– Programmable Xon/Xoff Characters
– Programmable Auto-RTSand Auto-CTS
Optional Data Flow Resume by Xon Any Character
DMA Signalling Capability for Both Received and Transmitted Data
Supports 3.3-V Operation
Software Selectable Baud Rate Generator
Prescaler Provides Additional Divide By 4 Function
Fast Access Time 2 Clock Cycle IOR/IOW Pulse Width
Programmable Sleep Mode
Programmable Serial Interface Characteristics
– 5, 6, 7, or 8 Bit Characters
– Even, Odd, or No Parity Bit Generation and Detection
– 1, 1.5, or 2 Stop Bit Generation
False Start Bit Detection
Complete Status Reporting Capabilities in Both Normal and Sleep Mode
Line Break Generation and Detection
Internal Test and Loopback Capabilities
Fully Prioritized Interrupt System Controls
Modem Control Functions (CTS, RTS, DSR, DTR, RI, and CD)

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