TUSB1310AZAY - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

TUSB1310AZAY
Manufacturer

TI
ChipWorker Part#

CW6014433
Category

Interface IC, Interface Controller
Package

LFBGA-175
Description

USB Interface, Universal Transceiver, USB 3.0, 1.045V, 3.63V, NFBGA, 175Pins
Documentation

Datasheet

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TUSB1310AZAY Specifications

Attribute	Attribute Value

Part Number	TUSB1310AZAY
Manufacturer	TI
ChipWorker Part#	CW6014433
Category	Interface IC, Interface Controller
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	175 Pin
Case/Package	LFBGA-175
Supply Voltage (DC)	1.04V (min)
Number of Positions	175 Position
Data Rate	5.00 Gbps
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage	1.1 V, 1.8 V, 3.3 V
Supply Voltage (Max)	3.63 V
Supply Voltage (Min)	1.045 V
	expand all
Size-Length	12.1 mm
Size-Width	12.1 mm
Size-Height	0.96 mm
Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Cut Tape (CT)
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
ECCN Code	EAR99

Product Description

Introduction
The TUSB1310A is a single port, 5.0-Gbps USB 3.0 physical layer transceiver operating off of a single reference clock provided by either a crystal or an external reference clock. The reference clock frequencies are selectable from 20, 25, 30, and 40 MHz. The TUSB1310A provides the clock to the USB controller. The use of a single reference clock allows the TUSB1310A to provide a cost effective USB 3.0 solution with few external components and a low implementation cost.
Features
• Universal Serial Bus (USB)
– Single Port 5.0-Gbps USB 3.0 Physical Layer Transceiver
• One 5.0-Gbps SuperSpeed Connection
• One 480-Mbps HS/FS/LS Connection
– Fully Compliant with USB 3.0 Specification, Revision 1.0
– Supports 3+ Meters USB 3.0 Cable Length
– Fully Adaptive Equalizer to Optimize Receiver Sensitivity
– PIPE to Link Layer Controller
• Supports 16-Bit SDR Mode at 250 MHz
• Compliant With PHY Interface for the USB Architectures (PIPE), Version 3.0
– ULPI to Link Layer Controller
• Supports 8-Bit SDR Mode at 60 MHz
• Supports Synchronous Mode and Low Power Mode
• Compliant with UTMI+ Low Pin Interface (ULPI) Specification, Revision 1.1
• General Features
– IEEE 1149.1 JTAG Support
– IEEE 1149.6 JTAG support for the SuperSpeed Port
– Operates on a Single Reference Clock of 40 MHz
– 3.3-, 1.8-, and 1.1-V Supply Voltages
– 1.8-V PIPE and ULPI I/O
– Available in Lead-Free 175-Ball 12- x 12-nF BGA Package (175ZAY)
Applications
• Surveillance Cameras
• Multimedia Handset
• Smartphone
• Digital Still Camera
• Portable Media Player
• Personal Navigation Device
• Audio Dock
• Video IP Phone
• Wireless IP Phone
• Software Defined Radio

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Ordering Information

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- Carefully tested and packaged by ChipWorker
- Vacuum packed
- Anti-static packaging
- Anti-vibration foam
- Income quality control (IQC), 800+ qualified distributors.
- Authorities test the chip to ensure the quality, authenticity and safety of your device.
- Decapsulation control
- X-ray inspection
- XRF inspection
- Electrical testing
- Surface testing

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