74V1G32STR - ST Microelectronics

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

74V1G32STR
Manufacturer

ST Microelectronics
ChipWorker Part#

CW74751920
Category

Logic Control, Logic Gate IC
Package

SOT-23-5
Description

OR Gate 1Element 2IN CMOS 5Pin SOT-23 T/R
Documentation

Datasheet

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74V1G32STR Specifications

Attribute	Attribute Value

Part Number	74V1G32STR
Manufacturer	ST Microelectronics
ChipWorker Part#	CW74751920
Category	Logic Control, Logic Gate IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	5 Pin
Case/Package	SOT-23-5
Supply Voltage (DC)	5.00 V
Number of Outputs	1 Output
Output Current	8 mA
Number of Circuits	1 Circuit
Number of Gates	1 Gate
Number of Inputs	2 Input
Operating Temperature (Max)	125 ℃
Operating Temperature (Min)	-55 ℃
Supply Voltage	2V ~ 5.5V
Supply Voltage (Max)	5.5 V
Supply Voltage (Min)	2 V
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Size-Length	3 mm
Size-Width	1.75 mm
Size-Height	1.3 mm
Operating Temperature	-55℃ ~ 125℃
Product Lifecycle Status	Not Recommended for New Designs
Packaging	Tape & Reel (TR)
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/12/17

Product Description

DESCRIPTION
The 74V1G32 is an advanced high-speed CMOS SINGLE 2-INPUT OR GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology.
The internal circuit is composed of 2 stages including buffer output, which provide high noise immunity and stable output.
Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V.
■ HIGH SPEED: tPD = 3.8ns (TYP.) at VCC = 5V
■ LOW POWER DISSIPATION:
ICC = 1µA(MAX.) at TA=25°C
■ HIGH NOISE IMMUNITY:
VNIH = VNIL = 28% VCC (MIN.)
■ POWER DOWN PROTECTION ON INPUTS
■ SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 8mA (MIN) at VCC = 4.5V
■ BALANCED PROPAGATION DELAYS:
tPLH = tPHL
■ OPERATING VOLTAGE RANGE:
VCC(OPR) = 2V to 5.5V
■ IMPROVED LATCH-UP IMMUNITY

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