CD4027BE - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

CD4027BE
Manufacturer

TI
ChipWorker Part#

CW769140
Category

Flip Flop IC
Package

DIP-16
Description

Flip-Flop, Master/Slave, Complementary, Positive Edge, CD4027, JK, 45ns, 24MHz, 6.8mA, DIP
Documentation

Datasheet

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CD4027BE Specifications

Attribute	Attribute Value

Part Number	CD4027BE
Manufacturer	TI
ChipWorker Part#	CW769140
Category	Flip Flop IC
Documentation	Datasheet
Mounting Style	Through Hole
Number of Pins	16 Pin
Case/Package	DIP-16
Frequency	24 MHz
Digital Logic Level	CMOS
Supply Voltage (DC)	15.0 V, 18.0 V (max)
Number of Outputs	1 Output
Output Current	6.8 mA
Number of Circuits	2 Circuit
Number of Channels	2 Channel
Number of Positions	16 Position
Clock Speed	24 MHz
Number of Bits	2 Bit
Polarity	Non-Inverting, Inverting
Voltage Nodes	5.00 V, 10.0 V, 15.0 V
Power Dissipation	500 mW
Number of Gates	2 Gate
Input Capacitance	5 pF
Number of Inputs	2 Input
Operating Temperature (Max)	125 ℃
Operating Temperature (Min)	-55 ℃
Supply Voltage	3V ~ 18V
Supply Voltage (Max)	18 V
Supply Voltage (Min)	3 V
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Size-Length	19.3 mm
Size-Width	6.35 mm
Size-Height	4.57 mm
Operating Temperature	-55℃ ~ 125℃
Product Lifecycle Status	Active
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2014/12/17
ECCN Code	EAR99

Product Description

The CD4027BE is a Single Monolithic Chip Integrated Circuit, containing two identical complementary-symmetry J-K master-slave flip-flops. Each flip-flop has provisions for individual J, K, set, reset and clock input signals. Buffered Q and Q\ signals are provided as outputs. This input-output arrangement provides for compatible operation with the RCA-CD4013B dual D-type flip-flop. The CD4027BE is useful in performing control, register and toggle functions. Logic levels present at the J and K inputs along with internal self-steering control the state of each flip-flop, changes in the flip-flop state are synchronous with the positive-going transition of the clock pulse. Set and reset functions are independent of the clock and are initiated when a high level signal is present at either the Set or Reset input.
Set-reset capability
Static flip-flop operation, retains state indefinitely with clock level either high or low
Medium speed operation - 16MHz (typical) clock toggle rate at 10V
Standardized, symmetrical output characteristics
100% Tested for quiescent current at 20V
Maximum input current of 1µA at 18V over full package-temperature range, 100nA at 18V and 25°C
5, 10 and 15V Parametric ratings

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