CD74HC221E - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

CD74HC221E
Manufacturer

TI
ChipWorker Part#

CW10135879
Category

Flip Flop IC
Package

DIP-16
Description

Monostable Multivibrator, 74HC221, 18ns, 5.2mA, 2V to 6V, DIP-16
Documentation

Datasheet

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CD74HC221E Specifications

Attribute	Attribute Value

Part Number	CD74HC221E
Manufacturer	TI
ChipWorker Part#	CW10135879
Category	Flip Flop IC
Documentation	Datasheet
Mounting Style	Through Hole
Number of Pins	16 Pin
Case/Package	DIP-16
Digital Logic Level	CMOS
Supply Voltage (DC)	5.00 V, 6.00 V (max)
Output Current	5.2 mA
Number of Circuits	2 Circuit
Number of Positions	16 Position
Number of Bits	2 Bit
Rise Time	400 ns
Fall Time	400 ns
Operating Temperature (Max)	125 ℃
Operating Temperature (Min)	-55 ℃
Supply Voltage	2V ~ 6V
Supply Voltage (Max)	6 V
Supply Voltage (Min)	2 V
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Operating Temperature	-55℃ ~ 125℃
Product Lifecycle Status	Active
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2014/12/17

Product Description

The CD74HC221E is a dual Monostable Multivibrator with RESET. An external resistor (RX) and an external capacitor (CX) control the timing and the accuracy for the circuit. Adjustment of RX and CX provides a wide range of output pulse widths from the Q and Q\ terminals. Pulse triggering on the B input occurs at a particular voltage level and is not related to the rise and fall time of the trigger pulse. Once triggered, the outputs are independent of further trigger inputs on A\ and B. The output pulse can be terminated by a low level on the RESET (R\\) pin. Trailing edge triggering (A\\) and leading-edge-triggering (B) inputs are provided for triggering from either edge of the input pulse. On power up, the IC is RESET. If either Mono is not used each input (on the unused device) must be terminated either high or low. The minimum value of external resistance, RX, is typically 500R.
Overriding RESET terminates output pulse
Triggering from the leading or trailing edge
Q and Q\ Buffered outputs
Separate resets
Wide range of output-pulse widths
Schmitt trigger on B inputs
Balanced propagation delay and transition times
Significant power reduction compared to LSTTL logic ICs
Direct LSTTL input logic compatibility
CMOS input compatibility

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