SN74AVCH8T245PWR - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN74AVCH8T245PWR
Manufacturer

TI
ChipWorker Part#

CW22995973
Category

Logic Controller, Logic IC
Package

TSSOP-24
Description

Transceiver, 74AVC8T245, 1.2V to 3.6V, TSSOP-24
Documentation

Datasheet

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SN74AVCH8T245PWR Specifications

Attribute	Attribute Value

Part Number	SN74AVCH8T245PWR
Manufacturer	TI
ChipWorker Part#	CW22995973
Category	Logic Controller, Logic IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	24 Pin
Case/Package	TSSOP-24
Supply Voltage (DC)	1.20V ~ 3.60V
Output Current	12 mA
Number of Circuits	1 Circuit
Number of Channels	8 Channel
Number of Positions	24 Position
Number of Bits	8 Bit
Propagation Delay Max (tpd)	2.50 ns
Number of Inputs	8 Input
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Number of Output Channels	8 Channel
Supply Voltage	1.2V ~ 3.6V
Supply Voltage (Max)	3.6 V
Supply Voltage (Min)	1.2 V
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Size-Length	7.9 mm
Size-Width	4.5 mm
Size-Height	1.05 mm
Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Tape & Reel (TR)
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
ECCN Code	EAR99

Product Description

The SN74AVCH8T245PWR is a 8-bit dual-supply Bus Transceiver with configurable voltage translation and 3-state outputs. The bus transceiver uses two separate configurable power-supply rails. The A port is designed to track VCCA, which accepts any supply voltage from 1.2 to 3.6V. The B port is designed to track VCCB, which also accepts any supply voltage from 1.2 to 3.6V. The SN74AVCH8T245 is designed for asynchronous communication between data buses. The device transmits data from either the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses are effectively isolated. Active bus-hold circuitry holds unused or un-driven inputs at a valid logic state. This device is fully specified for partial-power-down applications using IOFF. The IOFF circuitry disables the outputs, preventing damaging current backflow through the device.
Control inputs VIH/VIL levels are referenced to VCCA voltage
Bus hold on data inputs eliminates the need for external pull-up and pull-down resistors
VCC Isolation
Fully configurable dual-rail design
IOFF Supports partial-power-down mode operation
Latch-up performance exceeds 100mA per JESD 78, class II
Green product and no Sb/Br

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