SN74HC377N - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN74HC377N
Manufacturer

TI
ChipWorker Part#

CW1861100
Category

Flip Flop IC
Package

DIP-20
Description

Flip-Flop, Non Inverted, Positive Edge, 74HC377, D, 12ns, 23MHz, 5.2mA, DIP
Documentation

Datasheet

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SN74HC377N Specifications

Attribute	Attribute Value

Part Number	SN74HC377N
Manufacturer	TI
ChipWorker Part#	CW1861100
Category	Flip Flop IC
Documentation	Datasheet
Mounting Style	Through Hole
Number of Pins	20 Pin
Case/Package	DIP-20
Frequency	23 MHz
Supply Voltage (DC)	2.00V ~ 6.00V
Number of Outputs	8 Output
Output Current	5.2 mA
Number of Circuits	8 Circuit
Number of Channels	8 Channel
Number of Positions	20 Position
Clock Speed	64 MHz
Number of Bits	8 Bit
Propagation Delay Max (tpd)	34.0 ns
Polarity	Non-Inverting
Voltage Nodes	6.00 V, 5.00 V, 2.00 V
Input Capacitance	3 pF
Output Current Drive	-1.00 mA
Number of Inputs	8 Input
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage	2V ~ 6V
Supply Voltage (Max)	6 V
Supply Voltage (Min)	2 V
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Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Each
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2014/12/17
ECCN Code	EAR99

Product Description

The SN74HC377N is an octal positive-edge-triggered D-type Flip-flop with clock enable. It is similar to the HC273 devices, but features a latched clock-enable (CLKEN\\) input instead of a common clear. Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse, if CLKEN\ is low. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When clock is at either the high or low level, the D input has no effect at the output. It is designed to prevent false clocking by transitions at CLKEN\\.
Outputs can drive up to 10 LSTTL loads
Eight flip-flops with single-rail outputs
Clock enable latched to avoid false clocking
80µA Maximum low power consumption
12ns Typical tpd
±4mA Output drive at 5V
1µA Maximum low input current

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