TPIC6595N - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

TPIC6595N
Manufacturer

TI
ChipWorker Part#

CW16253933
Category

Shift Register IC
RoHS

Lead free / RoHS Compliant
Description

TEXAS INSTRUMENTS TPIC6595N Shift Register, Serial to Parallel, 1Element, 8Bit, DIP, 20Pins
Documentation

Datasheet

TPIC6595N Global Supplier

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TPIC6595N Specifications

Attribute	Attribute Value

Part Number	TPIC6595N
Manufacturer	TI
ChipWorker Part#	CW16253933
Category	Shift Register IC
Documentation	Datasheet
Mounting Style	Through Hole
Number of Pins	20 Pin
Case/Package	DIP-20
Supply Voltage (DC)	4.50V (min)
Power Rating	1.15 W
Number of Outputs	9 Output
Output Voltage	≤45.0 V
Output Current	250 mA
Supply Current	15.0 µA
Number of Positions	20 Position
Number of Bits	8 Bit
Power Dissipation	230 mW
Number of Inputs	1 Input
Operating Temperature (Max)	125 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage	4.5V ~ 5.5V
Supply Voltage (Max)	5.5 V
Supply Voltage (Min)	4.5 V
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Size-Length	24.33 mm
Size-Width	6.35 mm
Size-Height	4.57 mm
Operating Temperature	-40℃ ~ 125℃
Product Lifecycle Status	Active
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

Product Description

The TPIC6595N is a 8-bit Shift Register designed for use in systems that require relatively high load power. The device contains a built-in voltage clamp on the outputs for inductive transient protection. Power driver applications include relays, solenoids and other medium-current or high-voltage loads. This device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Data transfers through both the shift and storage registers on the rising edge of the shift-register clock (SRCK) and the register clock (RCK) respectively. The storage register transfers data to the output buffer when shift-register clear (SRCLR\\) is high. When SRCLR\ is low, the input shift register is cleared. When output enable (G\\) is held high, all data in the output buffers is held low and all drain outputs are off. When G\ is held low, data from the storage register is transparent to the output buffers.
Can be cascadable
Low power consumption
Eight power DMOS transistor outputs of 250mA continuous current
1.5A Pulsed current per output
Output clamp voltage at 45V
1.3R Typical low rDS(on)
75mJ Avalanche Energy

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