SN74ALS573CN - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN74ALS573CN
Manufacturer

TI
ChipWorker Part#

CW12553078
Category

Latche IC
Package

DIP-20
Description

TEXAS INSTRUMENTS SN74ALS573CN Latch, ALS Family, 74ALS573, D Type Transparent, Tri State, 14ns, 24mA, DIP
Documentation

Datasheet

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SN74ALS573CN Specifications

Attribute	Attribute Value

Part Number	SN74ALS573CN
Manufacturer	TI
ChipWorker Part#	CW12553078
Category	Latche IC
Documentation	Datasheet
Mounting Style	Through Hole
Number of Pins	20 Pin
Case/Package	DIP-20
Supply Voltage (DC)	4.50V ~ 5.50V
Number of Outputs	8 Output
Output Current	24 mA
Number of Circuits	1 Circuit
Number of Channels	8 Channel
Number of Positions	20 Position
Number of Bits	8 Bit
Propagation Delay Max (tpd)	14.0 ns
Polarity	Non-Inverting
Voltage Nodes	5.00 V
Quiescent Current	16.0 mA
Output Current Drive	-108 µA
Number of Inputs	8 Input
Operating Temperature (Max)	70 ℃
Operating Temperature (Min)	0 ℃
Supply Voltage	4.5V ~ 5.5V
Supply Voltage (Max)	5.5 V
Supply Voltage (Min)	4.5 V
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Size-Length	24.33 mm
Size-Width	6.35 mm
Size-Height	4.57 mm
Operating Temperature	0℃ ~ 70℃
Product Lifecycle Status	Active
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

Product Description

The SN74ALS573CN is an octal transparent D Latch with 3-state outputs. It is designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers and working registers. While the LE input is high, outputs (Q) respond to the data (D) inputs. When LE is low, the outputs are latched to retain the data that was set up. A buffered OE\ input can be used to place the eight outputs in either a normal logic state (high or low) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without interface or pull-up components. OE\ does not affect internal operation of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
Bus-structured pinout
True logic outputs
3-state Buffer-type outputs drive bus lines directly

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