SN74HC590AD - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

SN74HC590AD
Manufacturer

TI
ChipWorker Part#

CW13393244
Category

Logic Controller, Logic IC
Package

SOIC-16
Description

TEXAS INSTRUMENTS SN74HC590AD Binary Counter, HC Family, 40MHz, 2V to 6V, SOIC-16
Documentation

Datasheet

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SN74HC590AD Specifications

Attribute	Attribute Value

Part Number	SN74HC590AD
Manufacturer	TI
ChipWorker Part#	CW13393244
Category	Logic Controller, Logic IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	16 Pin
Case/Package	SOIC-16
Supply Voltage (DC)	2.00V ~ 6.00V
Number of Outputs	8 Output
Number of Positions	16 Position
Clock Speed	40 MHz
Number of Bits	8 Bit
Voltage Nodes	6.00 V, 5.00 V, 2.00 V
Output Current Drive	-1.00 mA
Number of Inputs	1 Input
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage	2V ~ 6V
Supply Voltage (Max)	6 V
Supply Voltage (Min)	2 V
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Size-Length	9.9 mm
Size-Width	3.91 mm
Size-Height	1.58 mm
Operating Temperature	-40℃ ~ 85℃
Product Lifecycle Status	Active
Packaging	Tube
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15
ECCN Code	EAR99

Product Description

The SN74HC590AD is a 8-bit Binary Counter with 3-state output registers. It feeds an 8-bit storage register. The storage register has parallel outputs. Separate clocks are provided for both the binary counter and storage register. The binary counter features direct clear (CCLR\\) and count-enable (CCKEN\\) inputs. A ripple-carry output (RCO\\) is provided for cascading. Expansion is accomplished easily for two stages by connecting RCO\ of the first stage to CCKEN\ of the second stage. Cascading for larger count chains can be accomplished by connecting RCO\ of each stage to the counter clock (CCLK) input of the following stage. CCLK and the register clock (RCLK) inputs are positive-edge triggered. If both clocks are connected together, the counter state always is one count ahead of the register. Internal circuitry prevents clocking from the CE.
High-current 3-state parallel register outputs can drive up to 15 LSTTL loads
Direct clear
80µA Maximum low power consumption
14ns Typical tpd
±6mA Output drive at 5V
1µA Maximum low input current
Green product and no Sb/Br

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