TFP401APZP - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

TFP401APZP
Manufacturer

TI
ChipWorker Part#

CW541167
Category

Interface IC, Interface Controller
Package

TQFP-100
Description

DVI RECEIVER, 3.6V, TQFP-100
Documentation

Datasheet

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TFP401APZP Specifications

Attribute	Attribute Value

Part Number	TFP401APZP
Manufacturer	TI
ChipWorker Part#	CW541167
Category	Interface IC, Interface Controller
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	100 Pin
Case/Package	TQFP-100
Frequency	25.0 MHz
Supply Voltage (DC)	3.30 V, 3.60 V (max)
Output Current	370 mA
Supply Current	370 mA
Number of Channels	3 Channel
Number of Positions	100 Position
Data Rate	495 Mbps
Operating Temperature (Max)	70 ℃
Operating Temperature (Min)	0 ℃
Supply Voltage	3V ~ 3.6V
Supply Voltage (Max)	3.6 V
Supply Voltage (Min)	3 V
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Size-Length	14 mm
Size-Width	14 mm
Size-Height	1 mm
Operating Temperature	0℃ ~ 70℃
Product Lifecycle Status	Active
Packaging	Each
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2014/12/17
ECCN Code	EAR99
HK STC License	NLR

Product Description

The TFP401APZP is a TI PanelBus™ DVI Receiver, HSYNC fix. The TI PanelBus™ flat-panel display product, part of a comprehensive family of end-to-end DVI 1.0 compliant solutions. Targeted primarily at desktop LCD monitors and digital projectors, the TFP401APZP finds applications in any design requiring high-speed digital interface. The TFP401APZP supports display resolutions up to 1080p and WUXGA in 24-bit true-colour pixel format. The TFP401APZP offers design flexibility to drive one or two pixels per clock, supports TFT or DSTN panels and provides an option for time-staggered pixel outputs for reduced ground bounce. PowerPAD advanced packaging technology results in best-of-class power dissipation, footprint and ultralow ground inductance. The TFP401APZP combines PanelBus circuit innovation with TI"s advanced 0.18µm EPIC-5 CMOS process technology, along with TI PowerPAD package technology to achieve a reliable, low-powered, low-noise, high-speed digital interface solution.
Supports pixel rates up to 165MHz (including 1080p and WUXGA at 60Hz)
Digital visual interface (DVI) specification compliant
True-colour, 24-bit/pixel, 16.7M colours at 1 or 2 pixels per clock
Laser trimmed internal termination resistors for optimum fixed impedance matching
Skew tolerant up to one pixel-clock cycle
4x Oversampling
Reduced power consumption - 1.8V core operation with 3.3V I/Os and supplies
Reduced ground bounce using time-staggered pixel outputs
Incorporates HSYNC jitter immunity
Green product and no Sb/Br
Device has limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

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