TMS320F28027FPTQ - TI

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

TMS320F28027FPTQ
Manufacturer

TI
ChipWorker Part#

CW1489244
Category

32-Bit Microcontroller IC
Package

LQFP-48
Description

MCU 32Bit C2000 C28x CISC 64KB Flash 1.8V/3.3V 48Pin LQFP
Documentation

Datasheet

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TMS320F28027FPTQ Specifications

Attribute	Attribute Value

Part Number	TMS320F28027FPTQ
Manufacturer	TI
ChipWorker Part#	CW1489244
Category	32-Bit Microcontroller IC
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	48 Pin
Case/Package	LQFP-48
Frequency	60 MHz
Supply Voltage (DC)	2.97V (min)
Number of Positions	48 Position
Clock Speed	60.0 MHz
RAM Memory Size	10 KB
Number of Bits	32 Bit
FLASH Memory Size	65536 B
Number of UARTs	1 UART
Number of ADCs	1 ADC
Number of Inputs and Outputs	22 Input IO
Operating Temperature (Max)	125 ℃
Operating Temperature (Min)	-40 ℃
Supply Voltage (Max)	3.63 V
Supply Voltage (Min)	2.97 V
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Operating Temperature	-40℃ ~ 125℃
Product Lifecycle Status	Active
Packaging	Tape & Reel (TR)
RoHS	RoHS Compliant
Lead-Free Status	Lead Free
REACH SVHC Compliance	No SVHC
REACH SVHC Compliance Edition	2015/06/15

Product Description

The TMS320F28027FPTQ is a 32-bit Piccolo Microcontroller provides the power of the C28x™ core coupled with highly integrated control peripherals in low pin-count devices. This family is code-compatible with previous C28xbased code, as well as providing a high level of analog integration. An internal voltage regulator allows for single-rail operation. Enhancements have been made to the HRPWM module to allow for dual-edge control (frequency modulation). Analog comparators with internal 10-bit references have been added and can be routed directly to control the PWM outputs. The ADC converts from 0 to 3.3V fixed full-scale range and supports ratio-metric VREFHI/VREFLO references. The ADC interface has been optimized for low overhead and latency.
High-efficiency 32-bit CPU ( TMS320C28x™)
16 x 16 and 32 x 32 MAC operations
16 x 16 Dual MAC
Harvard bus architecture
Atomic operations
Fast interrupt response and processing
Unified memory programming model
Code-efficient (in C/C++ and assembly)
Endianness - little endian
No power sequencing requirement
Integrated power-on and brown-out resets
Two internal zero-pin oscillators
On-chip crystal Oscillator/External clock input
Dynamic PLL ratio changes supported
Watchdog timer module
Missing clock detection circuitry
Peripheral interrupt expansion (PIE) block that supports all peripheral interrupts
Three 32-bit CPU timers
Independent 16-bit timer in each ePWM module
Code-security module

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