LPC3240FET296 - NXP

The pictures are for reference only, and the specific specifications can be found in the product manual.

Part No

LPC3240FET296
Manufacturer

NXP
ChipWorker Part#

CW390768200
RoHS

Lead free / RoHS Compliant
Description

MCU 16Bit/32Bit LPC3000 ARM926EJ-S RISC ROMLess 1.8V/2.5V/3.3V 296Pin TFBGA
Documentation

Datasheet

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LPC3240FET296 Specifications

Attribute	Attribute Value

Part Number	LPC3240FET296
Manufacturer	NXP
ChipWorker Part#	CW390768200
Documentation	Datasheet
Mounting Style	Surface Mount
Number of Pins	296 Pin
Case/Package	BGA
RAM Memory Size	256 KB
Number of ADCs	1 ADC
Operating Temperature (Max)	85 ℃
Operating Temperature (Min)	-40 ℃
Power Dissipation (Max)	1120 mW
Supply Voltage (Max)	3.3 V
Supply Voltage (Min)	1.8 V
	expand all
Product Lifecycle Status	Unknown
RoHS	RoHS Compliant

Product Description

Overview
The LPC3240 operates at CPU frequencies of up to 266 MHz. The NXP® implementation uses an ARM926EJ-S CPU core with a Harvard architectur, 5-stage pipeline, and an integral Memory Management Unit (MMU). The LPC3240 also includes 256 kB of on-chip static RAM, a NAND flash interface, an Ethernet MAC, and an external bus interface that supports SDR and DDR SDRAM, as well as static devices. In addition, the LPC3240 includes a USB 2.0 full-speed interface, seven UARTs, two I2C-bus interfaces, two SPI/SSP ports, two I2S-bus interfaces, two single output PWMs, a motor control PWM, six general purpose timers with capture inputs and compare outputs, a Secure Digital (SD) interface, and a 10-bit Analog-to-Digital Converter (ADC) with a touch screen sense option.
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## Features
* ARM926EJS processor, running at CPU clock speeds up to 266 MHz
* Vector Floating Point (VFP) coprocessor
* 32 kB instruction cache and a 32 kB data cache
* Up to 256 kB of Internal SRAM (IRAM)
* Selectable boot-up from various external devices
* Multi-layer AHB system that provides a separate bus for each AHB master
* External memory controller for DDR and SDR SDRAM as well as for static devices
* Two NAND flash controllers
* Master Interrupt Controller (MIC) and two Slave Interrupt Controllers (SIC)
* Eight channel General Purpose DMA (GPDMA) controller on the AHB
* 10/100 Ethernet MAC with dedicated DMA Controller
* USB interface supporting either device, host (OHCI compliant), or On-The-Go
* Four standard UARTs with fractional baud rate generation
* Three additional high-speed UARTs intended for on-board communications
* Two SPI controllers
* Two SSP controllers
* Two I2C-bus interfaces with standard open-drain pins
* Two I2S-bus interfaces, each with separate input and output channels
* Secure Digital (SD) memory card interface
* General Purpose (GP) input, output, and I/O pins
* 10 bit, 400 kHz Analog-to-Digital Converter (ADC)
* Real-Time Clock (RTC) with separate power pin and dedicated 32 kHz oscillator
* 32-bit general purpose high-speed timer with a 16-bit pre-scaler
* Six enhanced timer/counters
* 32-bit millisecond timer driven from the RTC clock
* WatchDog timer clocked by the peripheral clock
* Two single-output PWM blocks
* Motor control PWM
* Keyboard scanner function allows automatic scanning of an up to 8 x 8 key matrix
* Up to 18 external interrupts
* Standard ARM test/debug interface for compatibility with existing tools
* Emulation Trace Buffer (ETB) with 2048 x 24 bit RAM allows trace via JTAG
* Stop mode saves power
* On-chip crystal oscillator
* An on-chip PLL allows CPU operation up to the maximum CPU rate
* Boundary scan for simplified board testing
## Target Applications
* Consumer
* Medical
* Industrial
* Network control
## Features

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